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architecture, body, electronics, integrated circuit,
standards, testing (JTAG, or "IEEE Standard 1149.1") A
standard specifying how to control and monitor the pins of
compliant devices on a printed circuit board.
Each device has four JTAG control lines. There is a common
reset (TRST) and clock (TCLK). The data line daisy chains
one device's TDO pin to the TDI pin on the next device.
The protocol contains commands to read and set the values of
the pins (and, optionally internal registers) of devices.
This is called "boundary scanning". The protocol makes
board testing easier as signals that are not visible at the
board connector may be read and set.